The invention generally pertains to semiconductor structures that include a semiconductor substrate having a surface layer of semiconductor material, a first dielectric layer of a first dielectric material buried under the surface layer and a second dielectric layer buried under the surface layer. Methods are disclosed for manufacturing such semiconductor components or elements, in particular silicon on insulator (SOI) components or elements.
A SOI structure typically includes a silicon layer containing components. Beneath the components is a buried silicon oxide layer which provides insulation against stray currents and charges originating from ionized particles. The silicon oxide layer also provides good isolation of adjacent components formed in the same silicon layer, and in particular significantly reduces the stray capacitance between adjacent components. It rests on a silicon substrate which provides a mechanical support.
The surface silicon layer typically has a thickness in the range of about 10 nanometers (nm) to 1000 nm, for example. The oxide layer typically has a thickness on the order of a few hundred nanometers (for example 400 nm) or more.
The thickness of an SOI structure can vary, and in particular the thickness of the silicon layer may vary. Silicon layers of different thickness may correspond to fully depleted (FD) SOI components, which have a surface silicon layer from approximately 20 nm to approximately 40 nm thick, and partially depleted (PD) SOI components, in which the thickness of the surface silicon layer is greater than approximately 70 nm.
Silicon oxide layers of different thickness provide different degrees of isolation, different leakage currents, different voltage ratings, and different equivalent capacitances. The values of each of these parameters can be chosen by the designer. A particular thickness may suit different applications, for example, applications concerning logic circuits and other digital circuits and power applications. The PD SOI technology is preferred for some applications or functions, and the FD SOI technology or the bulk (silicon substrate) technology is preferred for other applications.
A need exists for integrating components and structures on the same substrate, having bulk (silicon substrate) areas, SOI areas and/or FD SOI and PD SOI areas. Moreover, there may be different thickness requirements for the surface silicon layers and/or different thickness requirements for the buried oxide layers. Such structures are needed in the field of microsystems that integrate sensors or accelerometers, for example, and in the field of “one chip systems” which integrate a plurality of functions on the same chip.
The great majority of SOI components are currently homogeneous. But techniques for producing SOI components with alternating bulk and SOI areas are known in the art.
FIGS. 1A and 1B are diagrams that illustrate a conventional first technique for producing SOI components or elements. A known technique is first used to produce an SOI component 2 onto which an etching mask 4 is deposited (see FIG. 1A). An etching step is then used to produce alternating bulk areas 6, 8 and SOI areas 10, 12, 14 (see FIG. 1B). This technique cannot be used at present to produce SOI areas having different thickness silicon layers and/or different thickness oxide layers on the same substrate. Nor can it be used at present to produce components integrating FD SOI areas and PD SOI areas on the same substrate, or to provide electrical continuity between bulk areas and the surface silicon layer in the SOI areas. Lastly, the structure obtained is not planar.
FIG. 2 is a diagram of a structure obtained by using another known technique, the separation by implanted oxygen (SIMOX) technique, for producing SOI components. Areas 16, 18 of silicon dioxide are obtained by implanting O++ ions through a mask 20. A structure including a thin surface film of monocrystalline silicon isolated from the mass of the substrate is produced. However, the layer of oxide produced in this manner is again a uniform layer. This technique cannot be used to produce layers having a different thickness on the same substrate.
The SIMOX technique also suffers from other problems. First, non-homogeneous stresses and other stresses occur in the substrate, as confirmed in the paper by S. Bagchi et al. published in the proceedings of the IEEE International SOI Conference, October 1999, p. 121-122, “Defect Analysis of Patterned SOI Material”. In particular, slight swellings or differences in flatness have been observed on the surface above the implanted areas 16, 18.
A wafer bonding technique is also known in the art, but cannot at present be used to produce SOI areas with different thickness requirements.
It would be desirable to have a technique for producing, on the same substrate, a semiconductor component, element or structure having two or more semiconductor on insulator areas with a different thickness of the surface semiconductor material layer and/or a different thickness of the dielectric material layer. It would also be useful to have a technique for producing, on the same substrate, a semiconductor component or element, or a semiconductor structure integrating bulk (semiconductor material substrate) areas and semiconductor on insulator areas and/or semiconductor material surface layer having a thickness that differs from one area to another, and/or a dielectric thickness that differs from one area to another.
It would also be desirable to be able to produce, on the same substrate, an SOI component, element or structure having two or more SOI areas having a different thickness of the surface silicon layer, and/or a different thickness of the oxide layer. In addition, it would be advantageous to produce, on the same substrate, a semiconductor component or element or an SOI semiconductor structure integrating bulk (silicon substrate) areas, SOI areas and/or FD SOI and PD SOI areas with a surface silicon thickness that differs from one area to another, and/or a dielectric thickness that differs from one area to another. A component, element or structure obtained by such a method should preferably be planar and provide electrical continuity between different areas of different thickness, and in particular between the different surface semiconductor material or silicon areas or layers. Stresses and dislocations must also be avoided or reduced.
It would be advantageous to be able to produce semiconductor components having buried dielectric elements individually connected by buried conductive elements. The dielectric elements may be buried layers of varying thickness, and may be situated under surface semiconductor layers that are of varying thickness. It would also be desirable to develop new techniques for producing such semiconductor substrates.